ISBN: 9781402093272
Until the 1990s, the reduction of the minimum feature sizes used to fabricate in- grated circuits, called “scaling”, has highlighted serious advantages as integration density,… Meer...
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ISBN: 9781402093272
Until the 1990s, the reduction of the minimum feature sizes used to fabricate in- grated circuits, called “scaling”, has highlighted serious advantages as integration density, speed, powe… Meer...
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2009, ISBN: 9781402093272
*Planar Double-Gate Transistor* - From Technology to Circuit. 2009 edition / gebundene Ausgabe für 160.49 € / Aus dem Bereich: Bücher, Wissenschaft, Technik Medien > Bücher nein Buch (geb… Meer...
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ISBN: 9781402093272
Until the 1990s, the reduction of the minimum feature sizes used to fabricate in- grated circuits, called “scaling”, has highlighted serious advantages as integration density,… Meer...
ISBN: 9781402093272
Until the 1990s, the reduction of the minimum feature sizes used to fabricate in- grated circuits, called “scaling”, has highlighted serious advantages as integration density, speed, powe… Meer...
2009
ISBN: 9781402093272
2009 Neubindung, Buchecken leicht angestossen 4705116/12 Versandkostenfreie Lieferung metal oxide semiconductur f,Circuit Design,CMOS,Double-Gate MOSFET,integrated circuit,analog design,f… Meer...
2009, ISBN: 9781402093272
*Planar Double-Gate Transistor* - From Technology to Circuit. 2009 edition / gebundene Ausgabe für 160.49 € / Aus dem Bereich: Bücher, Wissenschaft, Technik Medien > Bücher nein Buch (geb… Meer...
2009, ISBN: 9781402093272
*Planar Double-Gate Transistor* - From Technology to Circuit. 2009 edition / gebundene Ausgabe für 160.49 € / Aus dem Bereich: Bücher, Wissenschaft, Technik Medien > Bücher nein Buch (geb… Meer...
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Gedetalleerde informatie over het boek. - Planar Double-Gate Transistor
EAN (ISBN-13): 9781402093272
ISBN (ISBN-10): 1402093276
Gebonden uitgave
pocket book
Verschijningsjaar: 2009
Uitgever: Springer Nature Singapore
212 Bladzijden
Gewicht: 0,482 kg
Taal: eng/Englisch
Boek bevindt zich in het datenbestand sinds 2008-06-21T06:23:42+02:00 (Amsterdam)
Detailpagina laatst gewijzigd op 2024-04-15T17:23:21+02:00 (Amsterdam)
ISBN/EAN: 9781402093272
ISBN - alternatieve schrijfwijzen:
1-4020-9327-6, 978-1-4020-9327-2
alternatieve schrijfwijzen en verwante zoekwoorden:
Auteur van het boek: olivier
Titel van het boek: double, around the circuit, gate, transistor
Gegevens van de uitgever
Auteur: Amara Amara; Olivier Rozeau
Titel: Planar Double-Gate Transistor - From technology to circuit
Uitgeverij: Springer; Springer Netherland
211 Bladzijden
Verschijningsjaar: 2009-01-30
Dordrecht; NL
Gedrukt / Gemaakt in
Taal: Engels
160,49 € (DE)
164,99 € (AT)
177,00 CHF (CH)
POD
VIII, 211 p.
BB; Hardcover, Softcover / Technik/Elektronik, Elektrotechnik, Nachrichtentechnik; Schaltkreise und Komponenten (Bauteile); Verstehen; CMOS; Circuit Design; Compact modelling; Double-Gate MOSFET; Fully Depleted Silicon On Insulator; Leistungsfeldeffekttransistor; analog circuit design; analog design; digital design; field-effect transistor; integrated circuit; metal oxide semiconductur f; Electronic Circuits and Systems; Condensed Matter Physics; Spectroscopy; Optical Materials; Physik der kondensierten Materie (Flüssigkeits- und Festkörperphysik); Spektroskopie, Spektrochemie, Massenspektrometrie; Technische Anwendung von elektronischen, magnetischen, optischen Materialien; BC
This book on Double-Gates devices and circuit is unique and aims to reinforce the synergy between the research activities on CMOS sub-32nm devices and the design of elementary cells. The goal is to point out how we can take advantage of new transistor structures to come up with new basic cells and concepts that exploit the electrical features of these new devices and the breakthrough they bring. Planar Double-Gate Transistor will mainly focus on SOI CMOS transistors, fully depleted with double independent planar Gates (Independent Planar Double Gates Transistors: IPDGT), a potential candidate for the sub-32 nm technological nodes as planned by the current ITRS Roadmap. The book topics are mainly focusing on: Detailed description of specific processes that allow the optimization of the CMOS IPDGT device CMOS IPDGT modeling, both compact and physical models are presented Device characterization Design of innovating cells (SRAM cells, basic digital & analog functions) with the objectives to improve the level of integration and the robustness to variability as well as the power consumption optimization, using the degree of freedom introduced by the independent gates.First book dealing with Technology and Design Interaction Presents a cross-disciplinary based approach to optimize a new and complex technology Covers all aspects of IC Design with advanced technologies: process, device modelling, characterization, and circuit design of analogue, digital and memory circuits Introduces new circuit concepts taking benefit of the double-gate device structures
Andere boeken die eventueel grote overeenkomsten met dit boek kunnen hebben:
Laatste soortgelijke boek:
9781402093418 Planar Double-Gate Transistor (Amara Amara; Olivier Rozeau)
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