ISBN: 9789048172009
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ISBN: 9789048172009
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Fast, Efficient and Predictable Memory Accesses: Optimization Algorithms for Memory Architecture Aware Compilation - nieuw boek
ISBN: 9789048172009
The memory system is increasingly turning into a bottleneck in the design of embedded systems. The speed improvements of memory systems are lower than the speed improvements of processors… Meer...
2010, ISBN: 9789048172009
pocketboek
[ED: Kartoniert / Broschiert], [PU: Springer Netherlands], Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Focus on the increasing importa… Meer...
2006
ISBN: 9048172004
gebonden uitgave
Fast Efficient and Predictable Memory Accesses ab 160.49 € als Taschenbuch: Optimization Algorithms for Memory Architecture Aware Compilation. Softcover reprint of hardcover 1st ed. 2006.… Meer...
2010, ISBN: 9789048172009
Optimization Algorithms for Memory Architecture Aware Compilation, Buch, Softcover, Softcover reprint of hardcover 1st ed. 2006, [PU: Springer], Springer, 2010
ISBN: 9789048172009
Springer , pp. 272 . Papeback. New., Springer, 6
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Gedetalleerde informatie over het boek. - Fast, Efficient and Predictable Memory Accesses
EAN (ISBN-13): 9789048172009
ISBN (ISBN-10): 9048172004
Gebonden uitgave
pocket book
Verschijningsjaar: 2010
Uitgever: Springer
272 Bladzijden
Gewicht: 0,438 kg
Taal: eng/Englisch
Boek bevindt zich in het datenbestand sinds 2011-07-10T19:28:42+02:00 (Amsterdam)
Detailpagina laatst gewijzigd op 2023-10-13T22:04:45+02:00 (Amsterdam)
ISBN/EAN: 9789048172009
ISBN - alternatieve schrijfwijzen:
90-481-7200-4, 978-90-481-7200-9
alternatieve schrijfwijzen en verwante zoekwoorden:
Auteur van het boek: wehmeyer, marwedel
Titel van het boek: memory, algorithms, architecture
Gegevens van de uitgever
Auteur: Lars Wehmeyer; Peter Marwedel
Titel: Fast, Efficient and Predictable Memory Accesses - Optimization Algorithms for Memory Architecture Aware Compilation
Uitgeverij: Springer; Springer Netherland
258 Bladzijden
Verschijningsjaar: 2010-10-19
Dordrecht; NL
Gedrukt / Gemaakt in
Taal: Engels
106,99 € (DE)
109,99 € (AT)
118,00 CHF (CH)
POD
XII, 258 p.
BC; Hardcover, Softcover / Technik/Elektronik, Elektrotechnik, Nachrichtentechnik; Schaltkreise und Komponenten (Bauteile); Verstehen; Compiler; DRAM; Energy; Memory; RAM; Timing Predictability; embedded systems; processor; Electronic Circuits and Systems; Computer System Implementation; Operating Systems; Processor Architectures; Optical Materials; Electronics and Microelectronics, Instrumentation; Systemanalyse und -design; Betriebssysteme; Rechnerarchitektur und Logik-Entwurf; Technische Anwendung von elektronischen, magnetischen, optischen Materialien; Elektronik; BB
Abstract.- Models and Tools.- Scratchpad Memory Optimizations.- Main Memory Optimizations.- Register File Optimization.- Summary.- Future Work.Focus on the increasing importance of memory system design in embedded systems Solutions to the problems of energy-inefficient and slow memory systems with unpredictable access times Demonstration of the benefits of exploiting architectural features at the compiler level Unified overview and representation of memory and processor timing, energy and simulation models The first book to consider the positive effects of scratchpad memories on worst case execution time analysis
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