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Systematic Methodology for Real-Time Cost-Effective Mapping of Dynamic Concurrent Task-Based Systems on Heterogenous Platforms - pocketboek
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Systematic Methodology for Real-Time Cost-Effective Mapping of Dynamic Concurrent Task-Based Systems on Heterogenous Platforms - nieuw boek
2006, ISBN: 9789048176106
The main intention of this book is to give an impression of the state of the art in energy-aware task-scheduling-related issues for very dynamic emb- ded real-time processing applications… Meer...

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Systematic Methodology for Real-Time Cost-Effective Mapping of Dynamic Concurrent Task-Based Systems on Heterogenous Platforms - pocketboek2010, ISBN: 9048176107
[EAN: 9789048176106], Neubuch, [PU: Springer Netherlands], CLUSTER; COMPUTER-AIDEDDESIGN(CAD); CONCURRENTSYSTEMS; CONSTRAINT; EMBEDDEDSOFTWARE; MEMORYMANAGEMENT; PERFORMANCE-ENERGYTRADE-O… Meer...
Systematic Methodology for Real-Time Cost-Effective Mapping of Dynamic Concurrent Task-Based Systems on Heterogenous Platforms - pocketboek
2010
ISBN: 9048176107
gebonden uitgave
Softcover reprint of hardcover 1st ed. 2007 Kartoniert / Broschiert Computer-Aided Design (CAD), Compiler und Übersetzer, Rechnerarchitektur und Logik-Entwurf, Computer vision, cluster;… Meer...
Systematic Methodology for Real-Time Cost-Effective Mapping of Dynamic Concurrent Task-Based Systems on Heterogenous Platforms - pocketboek
2010, ISBN: 9048176107
gebonden uitgave
Softcover reprint of hardcover 1st ed. 2007 Kartoniert / Broschiert, mit Schutzumschlag neu, [PU:Springer Netherlands; Springer Netherland]
Systematic Methodology for Real-Time Cost-Effective Mapping of Dynamic Concurrent Task-Based Systems on Heterogenous Platforms - pocketboek
2010, ISBN: 9789048176106
Springer, 2010-11-24. Paperback. Good., Springer, 2010-11-24, 2.5
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Gedetalleerde informatie over het boek. - Systematic Methodology for Real-Time Cost-Effective Mapping of Dynamic Concurrent Task-Based Systems on Heterogenous Platforms
EAN (ISBN-13): 9789048176106
ISBN (ISBN-10): 9048176107
Gebonden uitgave
pocket book
Verschijningsjaar: 2010
Uitgever: Springer
276 Bladzijden
Gewicht: 0,421 kg
Taal: eng/Englisch
Boek bevindt zich in het datenbestand sinds 2011-05-16T07:00:00+02:00 (Amsterdam)
Detailpagina laatst gewijzigd op 2023-02-28T15:01:23+01:00 (Amsterdam)
ISBN/EAN: 9789048176106
ISBN - alternatieve schrijfwijzen:
90-481-7610-7, 978-90-481-7610-6
alternatieve schrijfwijzen en verwante zoekwoorden:
Auteur van het boek: couvreur, yang, zheng, schmitt, scarpa, marchal, peng, pol, himpe
Titel van het boek: systematic course the, real time systems, value above cost, dynamic systems
Gegevens van de uitgever
Auteur: Zhe Ma; Pol Marchal; Daniele Paolo Scarpazza; Peng Yang; Chun Wong; José Ignacio Gómez; Stefaan Himpe; Chantal Ykman-Couvreur; Francky Catthoor
Titel: Systematic Methodology for Real-Time Cost-Effective Mapping of Dynamic Concurrent Task-Based Systems on Heterogenous Platforms
Uitgeverij: Springer; Springer Netherland
264 Bladzijden
Verschijningsjaar: 2010-10-19
Dordrecht; NL
Gedrukt / Gemaakt in
Gewicht: 0,454 kg
Taal: Engels
139,09 € (DE)
142,99 € (AT)
153,50 CHF (CH)
POD
XII, 264 p.
BC; Circuits and Systems; Hardcover, Softcover / Technik/Elektronik, Elektrotechnik, Nachrichtentechnik; Schaltkreise und Komponenten (Bauteile); Verstehen; Cluster; Computer-Aided Design (CAD); Concurrent systems; Constraint; Embedded software; Mapping; Memory management; Performance-energy trade-offs; Scheduling; Task scheduling; Textur; algorithms; architecture; model; selection; Programming Languages, Compilers, Interpreters; Computer-Aided Engineering (CAD, CAE) and Design; Processor Architectures; Image Processing and Computer Vision; Electronic Circuits and Systems; Compilers and Interpreters; Computer-Aided Engineering (CAD, CAE) and Design; Processor Architectures; Computer Vision; Compiler und Übersetzer; Computer-Aided Design (CAD); Rechnerarchitektur und Logik-Entwurf; Maschinelles Sehen, Bildverstehen
Chapter 1: Introduction. 1.1 The System-on-Chip Era. 1.2 Characteristics of Embedded Software. 1.3 Context and Motivation. 1.4 TCM Framework. 1.5 Overview of Chapters. Chapter 2: Related Work. 2.1 Real-time Scheduling. 2.2 Low-power Considerations. 2.3 Platform Issues and Co-design Framework. Chapter 3: System Model and Work flow. 3.1 Overview of TCM Work flow. 3.2 Gray-box Model. 3.3 System Scenario Selection. 3.4 Two-phase Scheduling. 3.5 Summary. Chapter 4: Basic Design-time Scheduling. 4.1 Problem Formulation. 4.2 Exact Scheduling Algorithms. 4.3 Forward Search Algorithm. 4.4 Backward Search Algorithm. 4.5 Sub-platform Scheduling. 4.6 Handling Timing-Constraints. 4.7 Summary. Chapter 5: Scalable Design-time Scheduling. 5.1 Introduction. 5.2 Motivational Example. 5.3 Thread Frame Decomposition. 5.4 Thread Partition Clustering. 5.5 Thread Partition Interleaving. 5.6 Experimental Results and Discussions. 5.7 Comparison with State of the Art. 5.8 Summary. Chapter 6: Fast and Scalable Run-time Scheduling. 6.1 Two-Phase Task Scheduling: Why and How. 6.2 Run-time Scheduling Algorithm. 6.3 Experimental Results. 6.4 Summary. Chapter 7: Handling of Multi-dimensional Pareto Curves. 7.1 Overview of The Customized Run-time Management. 7.2 Problem Formulation of Run-time Operating Point Selector. 7.3 Related Work. 7.4 MP-SoC Heuristic Description. 7.5 Experimental Results. 7.6 Summary. Chapter 8: Run-time Software Multithreading. 8.1 Motivation of Run-time Re-scheduling. 8.2 Run-time Interleaving. 8.3 Experimental Results and Discussion. 8.4 Comparison with State of the Art. 8.5 Summary. Chapter 9: Fast Source-level Performance Estimation. 9.1 Introduction. 9.2 Motivational Example. 9.3 Comparison With State of The Art. 9.4 Fundamentals of The Estimation Technique. 9.5 Experimental Results. 9.6 Summary. Chapter 10: Handling of Task-level Data Communication and Storage. 10.1 Memory Architecture. 10.2Exploring Thread Node Level Data Reuse. 10.3 Data Assignment On L1 Memory Layer. 10.4 Bandwidth Aware Scheduling. 10.5 Handling inter-TN and inter-TF Data Transfers. 10.6 Summary. Chapter 11: Demonstration on Heterogeneous Multiprocessor SoCs. 11.1 Motivation for Heterogeneous Multiprocessor Platforms. 11.2 Mapping Visual Texture Coding Decoder. 11.3 Summary. Chapter 12: Conclusions and future research work. Input and output data of scheduling examples in Section 4.3.1. References.Andere boeken die eventueel grote overeenkomsten met dit boek kunnen hebben:
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