
2010, ISBN: 9789048176359
[ED: Softcover], [PU: Springer Netherlands], The complexity of embedded systems-on-a-chip is rapidly growing. Different experts are involved in the design process: application software designers, programmable core architects, on-chip communication engineers, analog and digital designers, deep sub micron specialists and process engineers. In order to arrive at an optimum implementation compromises are needed across boundaries of the different domains of expertise. Therefore, the authors of Power-Aware Architecting take the point of view of the system architect who is a generalist rather than an expert. He is responsible for the definition of a high level architecture, which is globally optimal. Finding an optimum requires a proper balance between area, performance and last but not least energy consumption. The challenge is not only the size of the design space but also the fact that the most important decisions are taken during the early design phases. The advantage of an early decision is that the impact on area, performance and energy consumption is large. But the disadvantage is that the available information is often limited, incomplete and inaccurate. The task of the system architect is to take the correct early decisions despite the uncertainties. Power-Aware Architecting provides a systematic way to support the system architect in this job. Therefore, an iterative system-level design approach is defined where iterations are based on fast and accurate estimations or predictions of area, performance and energy consumption. This method is illustrated with a concrete real life example of multi-carrier communication. This book is the result of a Ph.D. thesis, which is part of the UbiCom project at Delft University of Technology. I strongly recommend it to any engineer, expert of specialist, who is interested in designing embedded systems-on-a-chip. Jef van MeerbergenProfessor Eindhoven University of TechnologyFellow Philips Research Eindhoven This superb text provides a systematic way to support the system architect in this job. Therefore, an iterative system-level design approach is defined where iterations are based on fast and accurate estimations or predictions of area, performance and energy consumption. This method is illustrated with a concrete real life example of multi-carrier communication. This book is the result of a Ph.D. thesis, which is part of the UbiCom project at Delft University of Technology. The task of the system architect is to take the correct early decisions despite the uncertainties. Power-Aware Architecting provides a systematic way to support the system architect in this job. Therefore, an iterative system-level design approach is defined where iterations are based on fast and accurate estimations or predictions of area, performance and energy consumption. This method is illustrated with a concrete real life example of multi-carrier communication. This book is the result of a Ph.D. thesis, which is part of the UbiCom project at Delft University of Technology. I strongly recommend it to any engineer, expert or specialist, who is interested in designing embedded systems-on-a-chip. Jef van MeerbergenProfessor Eindhoven University of TechnologyFellow Philips Research Eindhoven 2010. X, 118 S. 235 mm Versandfertig in 3-5 Tagen, DE, [SC: 0.00], Neuware, gewerbliches Angebot, offene Rechnung (Vorkasse vorbehalten)
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ISBN: 9789048176359
Thecomplexityofembeddedsystems-on-a-chipisrapidlygrowing.Di?erentexpertsareinvolvedin the design process: application software designers, programmable core architects, on-chip com- nication engineers, analog and digital designers, deep submicron specialists and process engineers. In order to arrive at an optimum implementation compromises are needed across boundaries of the di?erent domains of expertise. Therefore, the authors of this book take the point of view of the system architect who is a generalist rather than an expert. He is responsible for the de?nition of a high level architecture, whichisgloballyoptimal.Findinganoptimumrequiresaproperbalancebetweenarea,performance and last but not least energy consumption. The challenge is not only the size of the design space but also the fact that the most important decisions are taken during the early design phases. The advantage of an early decision is that the impact on area, performance and energy consumption is large. But the disadvantage is that the available information is often limited, incomplete and inaccurate. The task of the system architect is to take the correct early decisions despite the uncertainties. Books > Engineering Soft cover, Springer Shop
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2010, ISBN: 9048176352
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Softcover reprint of hardcover 1st ed. 2007 Kartoniert / Broschiert Konstruktion, Entwurf, Energietechnik, Elektrotechnik und Energiemaschinenbau, Elektrotechnik, Elektronik, Design automation; Digital systems; Embedded Systems; HW/SW Codesign; Hardware; Low power; Modulation; SystemC; VLSI; Wireless communication; analog; communication; complexity; model; programming, mit Schutzumschlag neu, [PU:Springer Netherlands; Springer Netherland]
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ISBN: 9789048176359
Paperback, [PU: Springer], This superb text provides a systematic way to support the system architect in this job. Therefore, an iterative system-level design approach is defined where iterations are based on fast and accurate estimations or predictions of area, performance and energy consumption., Circuits & Components
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2010, ISBN: 9789048176359
[ED: Softcover], [PU: Springer Netherlands], The complexity of embedded systems-on-a-chip is rapidly growing. Different experts are involved in the design process: application software de… Meer...

ISBN: 9789048176359
Thecomplexityofembeddedsystems-on-a-chipisrapidlygrowing.Di?erentexpertsareinvolvedin the design process: application software designers, programmable core architects, on-chip com- nicati… Meer...
2010
ISBN: 9048176352
gebonden uitgave
Softcover reprint of hardcover 1st ed. 2007 Kartoniert / Broschiert Konstruktion, Entwurf, Energietechnik, Elektrotechnik und Energiemaschinenbau, Elektrotechnik, Elektronik, Design aut… Meer...

ISBN: 9789048176359
Paperback, [PU: Springer], This superb text provides a systematic way to support the system architect in this job. Therefore, an iterative system-level design approach is defined where it… Meer...
2010, ISBN: 9789048176359
gebonden uitgave
Softcover reprint of hardcover 1st ed. 2007, Softcover, Buch, [PU: Springer]
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Gedetalleerde informatie over het boek. - Power-Aware Architecting
EAN (ISBN-13): 9789048176359
ISBN (ISBN-10): 9048176352
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pocket book
Verschijningsjaar: 2010
Uitgever: Springer-Verlag GmbH
128 Bladzijden
Gewicht: 0,205 kg
Taal: eng/Englisch
Boek bevindt zich in het datenbestand sinds 2011-06-05T16:38:47+02:00 (Amsterdam)
Detailpagina laatst gewijzigd op 2020-08-12T21:29:26+02:00 (Amsterdam)
ISBN/EAN: 9789048176359
ISBN - alternatieve schrijfwijzen:
90-481-7635-2, 978-90-481-7635-9
Gegevens van de uitgever
Auteur: Maarten Ditzel; R.H. Otten; Wouter A. Serdijn
Titel: Power-Aware Architecting - for data-dominated applications
Uitgeverij: Springer; Springer Netherland
118 Bladzijden
Verschijningsjaar: 2010-10-19
Dordrecht; NL
Gedrukt / Gemaakt in
Gewicht: 0,454 kg
Taal: Engels
128,39 € (DE)
131,99 € (AT)
141,50 CHF (CH)
POD
X, 118 p.
BC; Previously published in hardcover; Hardcover, Softcover / Technik/Elektronik, Elektrotechnik, Nachrichtentechnik; Schaltkreise und Komponenten (Bauteile); Verstehen; Design automation; Digital systems; Embedded Systems; HW/SW Codesign; Hardware; Low power; Modulation; SystemC; VLSI; Wireless communication; analog; communication; complexity; model; programming; B; Circuits and Systems; Electrical Engineering; Engineering Design; Electronics and Microelectronics, Instrumentation; Energy Systems; Energy Systems; Electronic Circuits and Systems; Electrical and Electronic Engineering; Engineering Design; Electronics and Microelectronics, Instrumentation; Electrical Power Engineering; Mechanical Power Engineering; Engineering; Elektrotechnik; Konstruktion, Entwurf; Elektronik; Elektrotechnik; Energietechnik, Elektrotechnik und Energiemaschinenbau; BB
This superb text provides a systematic way to support the system architect in this job. Therefore, an iterative system-level design approach is defined where iterations are based on fast and accurate estimations or predictions of area, performance and energy consumption. This method is illustrated with a concrete real life example of multi-carrier communication. This book is the result of a Ph.D. thesis, which is part of the UbiCom project at Delft University of Technology.
1 Introduction. 1.1 High-level system design. 1.2 Power as design constraint. 1.3 Application. 1.4 Outline.
2 Design trade-offs 2.1 Introduction. 2.2 Area estimation. 2.3 Delay estimation. 2.4 Power estimation. 2.5 Area, delay, power trade-offs. 2.6 Summary.
3 Architecting with uncertainties. 3.1 Introduction. 3.2 Application model. 3.3 Architecture class. 3.4 Hardware-software partitioning. 3.5 Extension to multiple algorithms. 3.6 Dealing with uncertainty. 3.7 C to SystemC conversion. 3.8 Summary.
4 Multi-carrier communications. 4.1 Introduction. 4.2 Multi-path channels. 4.3 Principles of multi-carrier modulation. 4.4 Optimal energy assignment. 4.5 Quantization level. 4.6 Clipping level. 4.7 Summary.
5 Application. 5.1 Introduction. 5.2 Transceiver specification. 5.3 Implementation alternatives. 5.4 Summary.
6 Conclusions.
A Ubiquitous Communications. A.1 Applications. A.2 Necessities and consequences. A.3 Preliminary choices.
B Mixed integer programming. B.1 Linear programming. B.2 Mixed integer programming. B.3 Boolean algebra.
C Possibilistic linear programming. C.1 Introduction. C.2 Fuzzy objective coeffcients. C.3 Fuzzy objective, constraint and limit coeffcients.
Bibliography. References. Index.
Maarten Ditzel was born in Hattem, the Netherlands, on September 15, 1975. For his secondary education he attended the Gymnasium Celeanum in Zwolle and the Johan van Oldenbarnevelt Gymnasium in Amersfoort, where he obtained his diploma in 1993. The same year he started studying Electrical Engineering at Delft University of Technology. In 1998 he obtained the M.Sc. degree with honors in the field of micro-electronics. His thesis project dealt with the design and implementation of a processor core for a hybrid spread-spectrum transceiver and was carried out in the Circuits and Systems (CAS) group led by Prof. Ralph Otten. In 1998 Maarten started his research towards a Ph.D. degree at Delft University of Technology in the DIOC (Delft Center for Interfaculty Research) program Ubiquitous Communications, which resulted in this dissertation. During his Ph.D. he spent a month at IMEC (Interuniversity MicroElectronics Center), Leuven, Belgium. In addition, he worked for three months as a visiting scientist at Lucent Technologies, Bell-Labs Innovations, Murray-Hill, NJ, USA. Also during his Ph.D. research, he co-founded the student association MEST (Micro-Electronics and Silicon Technology). In October 2003 he was appointed to his current position as a researcher at the Physics and Electronics Laboratory of the Dutch Organization for Applied Scientific Research.
Provides a design methodology for data-dominated electronic systems, rather than a collection of particular designs
Provides a high-level design method to help the designer find a balance among competing design objectives
The design method provided finds an optimal solution to the hardware-software partitioning problem by means of mathematical programming
The resulting partitioning is optimal with regard to energy consumption, chip area or latency (execution time)
As a relevant and illustrative vehicle, the design methodology is applied to the design of an OFDM transceiver
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