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ISBN: 9789048181124

Functional Design Errors in Digital Circuits Diagnosiscovers a wide spectrum of innovative methods to automate the debugging process throughout the design flow: from Register-Transfer Lev… Meer...

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Mitwirkende: Markov, Igor L. Mitwirkende: Bertacco, Valeria, Springer, Taschenbuch, Auflage: Softcover reprint of hardcover 1st ed. 2009, 224 Seiten, Publiziert: 2010-10-28T00:00:01Z, Pro… Meer...

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Chang, Kai-Hui; Bertacco, Valeria; Markov, Igor L.:
Functional Design Errors in Digital Circuits Diagnosis Correction and Repair - pocketboek

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Kai-hui Chang; Igor L. Markov; Valeria Bertacco:
Functional Design Errors in Digital Circuits - pocketboek

2010, ISBN: 9789048181124

Diagnosis Correction and Repair, Buch, Softcover, Softcover reprint of hardcover 1st ed. 2009, [PU: Springer], Springer, 2010

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Functional Design Errors in Digital Circuits: Diagnosis Correction and Repair (Lecture Notes in Electrical Engineering, Band 32)
auteur:
Titel:
ISBN:

9789048181124


Functional Design Errors in Digital Circuits Diagnosis covers a wide spectrum of innovative methods to automate the debugging process throughout the design flow: from Register-Transfer Level (RTL) all the way to the silicon die. In particular, this book describes: (1) techniques for bug trace minimization that simplify debugging; (2) an RTL error diagnosis method that identifies the root cause of errors directly; (3) a counterexample-guided error-repair framework to automatically fix errors in gate-level and RTL designs; (4) a symmetry-based rewiring technology for fixing electrical errors; (5) an incremental verification system for physical synthesis; and (6) an integrated framework for post-silicon debugging and layout repair. The solutions provided in this book can greatly reduce debugging effort, enhance design quality, and ultimately enable the design and manufacture of more reliable electronic devices.

Gedetalleerde informatie over het boek. - Functional Design Errors in Digital Circuits: Diagnosis Correction and Repair (Lecture Notes in Electrical Engineering, Band 32)


EAN (ISBN-13): 9789048181124
ISBN (ISBN-10): 9048181127
Gebonden uitgave
pocket book
Verschijningsjaar: 2010
Uitgever: Springer
224 Bladzijden
Gewicht: 0,345 kg
Taal: eng/Englisch

Boek bevindt zich in het datenbestand sinds 2011-04-08T00:51:00+02:00 (Amsterdam)
Detailpagina laatst gewijzigd op 2023-03-04T19:44:46+01:00 (Amsterdam)
ISBN/EAN: 9789048181124

ISBN - alternatieve schrijfwijzen:
90-481-8112-7, 978-90-481-8112-4
alternatieve schrijfwijzen en verwante zoekwoorden:
Auteur van het boek: markov, chang, hui kai
Titel van het boek: error design, function circuits, electrical engineering, hui kai

Gegevens van de uitgever

Auteur: Kai-hui Chang; Igor L. Markov; Valeria Bertacco
Titel: Lecture Notes in Electrical Engineering; Functional Design Errors in Digital Circuits - Diagnosis Correction and Repair
Uitgeverij: Springer; Springer Netherland
200 Bladzijden
Verschijningsjaar: 2010-10-28
Dordrecht; NL
Gedrukt / Gemaakt in
Gewicht: 0,454 kg
Taal: Engels
160,49 € (DE)
164,99 € (AT)
177,00 CHF (CH)
POD
XXIV, 200 p.

BC; Circuits and Systems; Hardcover, Softcover / Technik/Elektronik, Elektrotechnik, Nachrichtentechnik; Schaltkreise und Komponenten (Bauteile); Verstehen; Automatic debugging; Error diagnosis; Error repair; Post-silicon debugging; algorithms; circuit design; formal verification; integrated circuit; layout; simulation; verification; Computer-Aided Engineering (CAD, CAE) and Design; Logic Design; Electronic Circuits and Systems; Computer-Aided Engineering (CAD, CAE) and Design; Logic Design; Computer-Aided Design (CAD); Rechnerarchitektur und Logik-Entwurf

Dedication. List of Figures. List of Tables. Preface. Part I Background and Prior Art. 1. INTRODUCTION. 1.1 Design Trends and Challenges. 1.2 State of the Art. 1.3 Our Approach. 1.4 Key Innovations and Book Outline. 2. CURRENT LANDSCAPE IN DESIGN AND VERIFICATION. 2.1 Front-End Design. 2.2 Back-End Logic Design. 2.3 Back-End Physical Design. 2.4 Post-Silicon Debugging. 3. FINDING BUGS AND REPAIRING CIRCUITS. 3.1 Simulation-Based Verification. 3.2 Formal Verification. 3.3 Design for Debugging and Post-Silicon Metal Fix. Part II FogClearMethodologies and Theoretical Advances in Error Repair. 4. CIRCUIT DESIGN AND VERIFICATION METHODOLOGIES. 4.1 Front-End Design. 4.2 Back-End Logic Design. 4.3 Back-End Physical Design. 4.4 Post-Silicon Debugging. 5. COUNTEREXAMPLE-GUIDED ERROR-REPAIR FRAMEWORK. 5.1 Background. 5.2 Error-Correction Framework for Combinational Circuits. 6. SIGNATURE-BASED RESYNTHESIS TECHNIQUES. 6.1 Pairs of Bits to be Distinguished (PBDs). 6.2 Resynthesis Using Distinguishing-Power Search. 6.3 Resynthesis Using Goal-Directed Search. 7. SYMMETRY-BASED REWIRING. 7.1 Background. 7.2 Exhaustive Search for Functional Symmetries. 7.3 Post-Placement Rewiring. 7.4 Experimental Results. 7.5 Summary. Part III FogClear Components. 8. BUG TRACE MINIMIZATION. 8.1 Background and PreviousWork. 8.2 Analysis of Bug Traces. 8.3 Proposed Techniques. 8.4 Implementation Insights. 8.5 Experimental Results. 8.6 Summary. 9. FUNCTIONAL ERROR DIAGNOSIS AND CORRECTION. 9.1 Gate-Level Error Repair for Sequential Circuits. 9.2 Register-Transfer-Level Error Repair. 9.3 Experimental Results. 9.4 Summary. 10. INCREMENTAL VERIFICATION FOR PHYSICAL SYNTHESIS. 10.1 Background. 10.2 Incremental Verification. 10.3 Experimental Results. 10.4 Summary. 11. POST-SILICON DEBUGGING AND LAYOUT REPAIR. 11.1 Physical Safeness and Logical Soundness. 11.2 New ResynthesisTechnique—SafeResynth. 11.3 Physically-Aware Functional Error Repair. 11.4 Automating Electrical Error Repair. 11.5 Experimental Results. 11.6 Summary. 12. METHODOLOGIES FOR SPARE-CELL INSERTION. 12.1 Existing Spare-Cell Insertion Methods. 12.2 Cell Type Analysis. 12.3 Placement Analysis. 12.4 Our Methodology. 12.5 Experimental Results. 12.6 Summary. 13. CONCLUSIONS. Index. References.
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