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Models in Hardware Testing: Lecture Notes of the Forum in Honor of Christian Landrault / Hans-Joachim Wunderlich / Buch / Frontiers in Electronic Testin / Englisch / 2009 / SPRINGER NATURE - Wunderlich, Hans-Joachim
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2010, ISBN: 9789048132812

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Models in Hardware Testing
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Titel:
ISBN:

9048132819


Model based testing is the most powerful technique for testing hardware and software systems. Models in Hardware Testing describes the use of models at all the levels of hardware testing. The relevant fault models for nanoscaled CMOS technology are introduced, and their implications on fault simulation, automatic test pattern generation, fault diagnosis, memory testing and power aware testing are discussed. Models and the corresponding algorithms are considered with respect to the most recent state of the art, and they are put into a historical context by a concluding chapter on the use of physical fault models in fault tolerance.

Gedetalleerde informatie over het boek. - Models in Hardware Testing


EAN (ISBN-13): 9789048132812
ISBN (ISBN-10): 9048132819
Gebonden uitgave
pocket book
Verschijningsjaar: 2009
Uitgever: SPRINGER NATURE
257 Bladzijden
Gewicht: 0,546 kg
Taal: eng/Englisch

Boek bevindt zich in het datenbestand sinds 2009-07-21T23:37:11+02:00 (Amsterdam)
Detailpagina laatst gewijzigd op 2024-01-22T09:42:06+01:00 (Amsterdam)
ISBN/EAN: 9048132819

ISBN - alternatieve schrijfwijzen:
90-481-3281-9, 978-90-481-3281-2
alternatieve schrijfwijzen en verwante zoekwoorden:
Auteur van het boek: wunderlich, hans see, hans joachim, generation, treats
Titel van het boek: hardware, models, wärme, hans wunderlich, wunderli, forum

Gegevens van de uitgever

Auteur: Hans-Joachim Wunderlich
Titel: Frontiers in Electronic Testing; Models in Hardware Testing - Lecture Notes of the Forum in Honor of Christian Landrault
Uitgeverij: Springer; Springer Netherland
257 Bladzijden
Verschijningsjaar: 2009-12-07
Dordrecht; NL
Gedrukt / Gemaakt in
Taal: Engels
106,99 € (DE)
109,99 € (AT)
118,00 CHF (CH)
POD
XIV, 257 p.

BB; Hardcover, Softcover / Informatik, EDV/Hardware; Computerhardware; Verstehen; Automat; CMOS; Hardware; algorithms; logic; model; modeling; simulation; Computer Hardware; Computer Science Logic and Foundations of Programming; Computer Modelling; Electronic Circuits and Systems; Hardware Performance and Reliability; Theoretische Informatik; Computermodellierung und -simulation; Schaltkreise und Komponenten (Bauteile); EA; BC

describes the use of models at all the levels of hardware testing. The relevant fault models for nanoscaled CMOS technology are introduced, and their implications on fault simulation, automatic test pattern generation, fault diagnosis, memory testing and power aware testing are discussed. Models and the corresponding algorithms are considered with respect to the most recent state of the art, and they are put into a historical context by a concluding chapter on the use of physical fault models in fault tolerance.

Contributing Authors. Preface. To Christian: a Real Test & Taste Expert. From LAAS to LIRMM and Beyond. 1: Open Defects in Nanometer Technologies; J. Figueras, et al. 2: Models for Bridging Defects; M. Renovell, et al. 3: Models for Delay Faults; S. M. Reddy. 4: Fault Modeling for Simulation and ATPG; B. Becker, I. Polian. 5: Generalized Fault Modeling for Logic Diagnosis; H.-J. Wunderlich, S. Holst. 6: Models in Memory Testing, From functional testing to defect-based testing; S. Di Carlo, P. Prinetto. 7: Models for Power-Aware Testing; P. Girard, H.-J. Wunderlich. 8: Physical Fault Models and Fault Tolerance; J. Arlat, Y. Crouzet. Index.

describes the use of models at all the levels of hardware testing. The relevant fault models for nanoscaled CMOS technology are introduced, and their implications on fault simulation, automatic test pattern generation, fault diagnosis, memory testing and power aware testing are discussed. Models and the corresponding algorithms are considered with respect to the most recent state of the art, and they are put into a historical context by a concluding chapter on the use of physical fault models in fault tolerance.

treats models and especially fault models in hardware testing in a comprehensive way not found anywhere else. Engineers who are responsible for product quality and test coverage, students who want to learn about quality assessment for new technologies or lecturers who are interested in the most recent advances in model based hardware testing will take benefits from reading.

was prepared for the forum in honor of Christian Landrault in connection with the European Test Symposium 2009.


Introduction of model based hardware testing Describes fault models for nanoscaled CMOS technology Fault simulation, ATPG and diagnosis algorithms for complex fault models Comprehensive treatment including memory and low power aspects

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9789048132829 Models in Hardware Testing (Hans-Joachim Wunderlich)

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