Cryptographic Hardware and Embedded Systems - CHES 2007: 9th International Workshop, Vienna, Austria, September 10-13, 2007, Proceedings (Lecture Notes in Computer Science, 4727, Band 4727) - pocketboek

EAN (ISBN-13): 9783540747345
ISBN (ISBN-10): 3540747346
Gebonden uitgave
pocket book
Verschijningsjaar: 2007
Uitgever: Paillier, Pascal, Springer Berlin Heidelberg

Boek bevindt zich in het datenbestand sinds 2007-10-29T02:53:10+01:00 (Amsterdam)
Detailpagina laatst gewijzigd op 2023-10-10T07:09:40+02:00 (Amsterdam)
ISBN/EAN: 9783540747345

ISBN - alternatieve schrijfwijzen:
3-540-74734-6, 978-3-540-74734-5
alternatieve schrijfwijzen en verwante zoekwoorden:
Auteur van het boek: even pascal
Titel van het boek: proceedings international workshop, embedded systems, hardware, who who austria, new vienna now, computer science, pascal

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Gegevens van de uitgever

Auteur: Pascal Paillier; Ingrid Verbauwhede
Titel: Lecture Notes in Computer Science; Security and Cryptology; Cryptographic Hardware and Embedded Systems - CHES 2007 - 9th International Workshop, Vienna, Austria, September 10-13, 2007, Proceedings
Uitgeverij: Springer; Springer Berlin
468 Bladzijden
Verschijningsjaar: 2007-08-28
Berlin; Heidelberg; DE
Taal: Engels
53,49 € (DE)
54,99 € (AT)
59,00 CHF (CH)
Available
XIV, 468 p.

BC; Hardcover, Softcover / Informatik, EDV/Informatik; Kodierungstheorie und Verschlüsselung (Kryptologie); Verstehen; Informatik; AES; Information; RSA public keys; Signatur; Ultra; cipher implementation; communication; cryptanalysis; cryptographic hardware; cryptography; network security; power analysis; security; side-channel attacks; smart car; Cryptology; Computer Communication Networks; Special Purpose and Application-Based Systems; Logic Design; Operating Systems; IT Operations; Kryptografie, Verschlüsselungstechnologie; Netzwerk-Hardware; Wissensbasierte Systeme, Expertensysteme; Rechnerarchitektur und Logik-Entwurf; Betriebssysteme; Wirtschaftsmathematik und -informatik, IT-Management; EA

Differential and Higher Order Attacks.- A First-Order DPA Attack Against AES in Counter Mode with Unknown Initial Counter.- Gaussian Mixture Models for Higher-Order Side Channel Analysis.- Side Channel Cryptanalysis of a Higher Order Masking Scheme.- Random Number Generation and Device Identification.- High-Speed True Random Number Generation with Logic Gates Only.- FPGA Intrinsic PUFs and Their Use for IP Protection.- Logic Styles: Masking and Routing.- Evaluation of the Masked Logic Style MDPL on a Prototype Chip.- Masking and Dual-Rail Logic Don’t Add Up.- DPA-Resistance Without Routing Constraints?.- Efficient Algorithms for Embedded Processors.- On the Power of Bitslice Implementation on Intel Core2 Processor.- Highly Regular Right-to-Left Algorithms for Scalar Multiplication.- MAME: A Compression Function with Reduced Hardware Requirements.- Collision Attacks and Fault Analysis.- Collision Attacks on AES-Based MAC: Alpha-MAC.- Secret External Encodings Do Not Prevent Transient Fault Analysis.- Two New Techniques of Side-Channel Cryptanalysis.- High Speed AES Implementations.- AES Encryption Implementation and Analysis on Commodity Graphics Processing Units.- Multi-gigabit GCM-AES Architecture Optimized for FPGAs.- Public-Key Cryptography.- Arithmetic Operators for Pairing-Based Cryptography.- FPGA Design of Self-certified Signature Verification on Koblitz Curves.- How to Maximize the Potential of FPGA Resources for Modular Exponentiation.- Implementation Cost of Countermeasures.- TEC-Tree: A Low-Cost, Parallelizable Tree for Efficient Defense Against Memory Replay Attacks.- Power Analysis Resistant AES Implementation with Instruction Set Extensions.- Security Issues for RF and RFID.- Power and EM Attacks on Passive RFID Devices.- RFID Noisy Reader How toPrevent from Eavesdropping on the Communication?.- RF-DNA: Radio-Frequency Certificates of Authenticity.- Special Purpose Hardware for Cryptanalysis.- CAIRN 2: An FPGA Implementation of the Sieving Step in the Number Field Sieve Method.- Collision Search for Elliptic Curve Discrete Logarithm over GF(2 m ) with FPGA.- A Hardware-Assisted Realtime Attack on A5/2 Without Precomputations.- Side Channel Analysis.- Differential Behavioral Analysis.- Information Theoretic Evaluation of Side-Channel Resistant Logic Styles.- Problems and Solutions for Lightweight Devices.- On the Implementation of a Fast Prime Generation Algorithm.- PRESENT: An Ultra-Lightweight Block Cipher.- Cryptographic Hardware and Embedded Systems - CHES 2007.